PWMTC will be continously incrementing whenever it reaches the PWMMRO, timer will be reset depeding on PWMTCR configuraion. This bit is used Enable/Disable the loading of new Match value whenever the PWMTC is reset(x:0-6) This bit is used to enable/disable the PWM output for PWMx(x:1-6) This bit is used to select the single edged and double edge mode form PWMx (x:2-6)

This will stop the PWM whenever the PWMTC reaches the Match register value. This bit is used to Stop the PWMTC,PWMPC whenever the PWMTC matches PWMMRx(x:0-6).ġ- Enable the PWM Stop feature. This bit is used to Reset PWMTC whenever it Matches PWMRx(x:0-6)ġ- Reset the PWMTC counter value whenever it matches PWMRx. This bit is used to Enable or Disable the PWM interrupts when the PWMTC matches PWMMRx (x:0-6) This bit is used to clear the PWM Timer and PWM Prescalar Counter values.ġ- The PWM Timer Counter and the PWM Prescale Counter are synchronously reset on the next positive edge of PCLK. This bit is used to Enable or Disable the PWM Timer and PWM Prescalar Counters Load Enable Register: Enables use of new PWM values once the match occurs.

Enables PWM outputs and selects PWM channel types as either single edge or double edge controlled. PWM Control Register: PWM Control Register. Match Registers: These registers holds the Match value(PWM Duty) for corresponding PWM channels(PWM1-PWM6). Match Register: This register hold the max cycle Time(Ton+Toff). Match Control Register: The MCR is used to control the reseting of TC and generating of interrupt whenever a Match occurs. When the value in PR is reached, the TC is incremented.

Prescale Counter: The 32-bit PC is a counter which is incremented to the value stored in PR. Prescalar Register: This is used to specify the Prescalar value for incrementing the TC. Timer Counter: The 32-bit TC is incremented every PR+1 cycles of PCLK. Timer Control Register: The TCR is used to control the Timer Counter functions(enable/disable/reset).

Writing Logic-1 will clear the corresponding interrupt. Interrupt Register: The IR can be read to identify which of eight possible interrupt sources are pending. The below table shows the registers associated with LPC1768 PWM. Below block diagram shows the PWM pins and the associated Match(Duty Cycle) registers.Ġ-GPIO, 1- PWM1, 2-CTS1, 3-TRACEDATAĠ-GPIO, 1- PWM1, 2-DCD1, 3-TRACEDATAĠ-GPIO, 1- PWM1, 2-DSR1, 3-TRACEDATAĠ-GPIO, 1- PWM1, 2-DTR1, 3-TRACEDATA There as seven match registers to support these 6 PWM output signals. LPC1768 has 6 PWM output pins which can be used as 6-Single edged or 3-Double edged.

8051 pwm signal